AMD Announces EPYC Embedded 9006 With Up to 256 Cores and PCIe Gen 6
AMD announced the EPYC Embedded 9006 Series SP7, a Zen 6-generation embedded processor with up to 256 cores and 512 threads, built on a 2nm process.
2 sources 23h ago
Reporting from 2 sources: ASCII.jp, GIGAZINE.
Why it matters
AMD is positioning the embedded line on memory and I/O bandwidth rather than core count alone, with MRDIMM and PCIe Gen 6 aimed at test, firewall, and storage boxes where data movement, not compute, is the limit.
Key Facts
- AMD announced the EPYC Embedded 9006 Series SP7 with up to 256 cores and 512 threads on a 2nm Zen 6 process.
- The EPYC Embedded 9006 Series supports 96 lanes of PCIe Gen 6, CXL 3.1, and 16-channel DDR5 with MRDIMM up to 12,800 MT/s.
- The EPYC Embedded 9006 lineup has six models, from the 64-core EPYC Embedded 9556 to the 256-core EPYC Embedded 9976.
- The 128-core EPYC Embedded 9756 ships first on November 15, 2026, with the remaining models expected in late December 2026.
- AMD guarantees seven years of product supply for the EPYC Embedded 9006 Series and keeps compatibility with the existing SP7 socket.
The chip adds PCIe Gen 6 at 96 lanes, CXL 3.1, and 16-channel DDR5 memory with MRDIMM support up to 12,800 MT/s. AMD claims up to 1.8 times the socket throughput of the previous EPYC Embedded 9005 Series and up to 2.7 times the memory bandwidth. The lineup has six models, from the 64-core EPYC Embedded 9556 to the 256-core EPYC Embedded 9976, and every model carries the full 16-channel memory and 96-lane PCIe Gen 6 configuration. AMD targets three workloads: automated semiconductor test equipment, next-generation network firewalls, and enterprise storage. The 128-core EPYC Embedded 9756 ships first on November 15, 2026, with the remaining models expected in late December 2026. Systems from embedded ODM partners are scheduled to begin shipping in January 2027.
- AMD compares the 9006 Series to Intel's Xeon 6 (Xeon 6980P), claiming up to 2.0 times the performance.
- Memory support covers RDIMM at up to 8000 MT/s alongside MRDIMM at up to 12,800 MT/s, and I/O bandwidth grows to up to 1.5 times the previous generation.
- Security includes secure boot through a hardware Root of Trust, post-quantum cryptography for firmware signing, a dedicated AMD Security Processor for virtualized memory protection, and a device identity engine based on the open-source Caliptra standard.
- AMD guarantees seven years of product supply with long-term BIOS and firmware maintenance, and the SP7 socket is compatible with the existing one for upgrades.
- In network firewalls the chip claims up to 1.3 times the DPDK L3 packet forwarding throughput of the previous generation, aimed at 400G and 800G networks.
- In enterprise storage it claims up to 1.5 times the speedup on the ISA-L benchmark for compression, caching, and RAID work.
The core counts sit alongside a wider server launch. AMD also detailed its 6th Gen EPYC 9006 server chips, codenamed Venice, at its AMD In Depth 2026 event. Those split into Zen 6c parts at up to 256 cores and 4.1GHz and Zen 6 parts at up to 96 cores and 5.3GHz, with a Venice-X variant carrying up to 1152MB of L3 cache per socket and a Verano variant built on TSMC N2P with 24-channel LPDDR5X.
Written with AI by Yomimono from the 2 cited sources below, including Japanese-language reporting where cited. See our editorial policy.
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